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E. the bits of the register are loaded simultaneously with a single clock pulse

3. How many control signals has bidirectional shift register with parallel load got?

A. 2 B. 3 C.4 D.5 E.6

4. The content of a 4-bit shift register is initially 1101. The register is shifted 6 times to the right, with the serial input being 101101. What is the content of the register after the first shift?

A. 0101 B. 1100 C. 1110 D. 1101 E. 1010

5. What types of operation bidirectional shift register with parallel load has?

A. shift right, parallel load B. shift left, parallel load

C. shift right, shift left, parallel load D. Complement, no change

E. shift right, shift left, parallel load, no change

6. Feedback shift register is such type of register, when

A. each flip-flop transfers its content to the next flip-flop

B. each flip-flop transfers its content to the next flip-flop, when a clock pulse occurs

C. each flip-flop transfers its content to the next flip-flop, when a clock pulse occurs, but the next state of the first flip-flop(for MSD) is some function of the present state of other flip-flops

D. each flip-flop transfers its content to the next flip-flop, when a clock pulse occurs, but the next state of the first flip-flop(for LSD) is some function of the present state of other flip-flops

E. each flip-flop transfers its content to the next flip-flop, when a clock pulse occurs, but the next state of the last flip-flop(for LSD) is some function of the present state of other flip-flops

7. If Johnson counter has got 3 flip-flops, we can have sequence of _____ timing signals.

A. 3 B. 4 C. 5 D. 6 E.9

8. For what purpose is buffer used?

A. to reduce loading of the device to which the buffer is connected

B. to improve characteristics of the circuit C. to decrease propagation delay

D. to increase propagation delay E. all aforementioned answers are wrong

9. A flip-flop has a 10-ns delay from the time its CP input goes from 1 to 0 to the time the output is complemented. What is the maximum frequency the counter can operate at reliably?

A. 5 MHz B. 6.25 MHz C. 8.33 MHz D. 10 MHz E. 12.5 MHz

10. The circuit below is a mod-_____ counter.

A. 1 B. 2 C. 3 D. 4 E. 5

LITERATURE

1. M. Morris Mano. Digital Logic and Computer Design.1999

2. William Kleitz. Digital Electronics. A Practical Approach. Forth Edition. Prentice- Hall International, Inc. 1996

3. Larissa A. Kiziyeva. Digital Design. Test Questions. SDU.Almaty, 2002

4. Dr. Melik Ş ah Ertugrul, Larissa A. Kiziyeva. Digital Design.Lab works’ description. SDU. Almaty, 2005

5. M.Morris Mano, Michael D. Ciletti. Digital Design (4^th eddition). Prentice- Hall of India 2008

6. Robert Boylestad, Louis Nashelsky. Electronic Devices and circuit theory. PRENTICE HALL 2008